- Company Name
- NANOXPLORE
- Job Title
- Ingénieur architecte Systeme/SoC F/H
- Job Description
-
Job title: SoC System Architect Engineer
Role Summary: Own the design and architecture of FPGA‑based SoC systems, defining functional partitions, interconnects, and IP selection to meet performance, power, area, and routability targets. Lead technical documentation, reviews, and cross‑disciplinary coordination to deliver a manufacturable product on schedule.
Expectations: Deliver a fully defined SoC architecture that aligns with product specifications and quality goals. Ensure timely progression through design, verification, implementation, and prototyping stages. Mentor and train teams on complex SoC concepts and best practices.
Key Responsibilities:
- Analyze product requirements and translate them into a detailed SoC architecture, including functional blocks, interfaces, and data flows.
- Author comprehensive technical architecture documents covering use cases, features, partitioning, interconnections, and power/performance trade‑offs.
- Lead IP selection, parameterization, and integration with the SoC, coordinating with hardware, verification, physical implementation, DFT, prototyping, and embedded software groups.
- Conduct design reviews to verify compliance with architectural specifications throughout the development cycle.
- Define and refine the SoC‑FPGA interface in collaboration with the FPGA team.
- Provide technical guidance on SoC/ASIC challenges, including processors, cache coherence, SMMU, virtualization, hardware security, interconnect, memory, peripherals, and trace/debug/error handling.
- Support project management efforts to secure industrial‑ready products within deadlines and quality standards.
Required Skills:
- >10 years experience as a SoC architect with strong leadership and team‑engagement abilities.
- Deep knowledge of SoC/ASIC design, IPs, and major features: ARM processors, cache coherence, SMMU, system/software virtualization, hardware security (boot, lifecycle, cryptography services), interconnects, DDR4/DDR5/LPDDR5, eMMC, TCM, QSPI, PCIe, GbE, USB, UART, high‑speed links, and trace/debug/error management.
- Experience with chiplet partitioning is a plus.
- Proficient in system architecture documentation, review facilitation, and cross‑functional collaboration.
- Strong communication and mentoring skills.
Required Education & Certifications:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- Professional certifications in SoC architecture or embedded systems (optional but desirable).